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They are controlled by two memory mapped registers. Data being read from a pin configured as an input is synchronized to the ADSP s clock.

Bits that are programmed as outputs will read the value ADSP-21992 EZ-KIT Lite output. The PF pins default to input during reset. FL0-FL2 are dedicated output flags. The assembly language, which takes full advantage of the processor s unique architecture, offers the following benefits: The algebraic syntax eliminates the need to remember cryptic assembler mnemonics.


Every instruction assembles into a single, bit word that can execute in a single instruction cycle. The syntax is a superset ADSP Family assembly language and is completely source ADSP-21992 EZ-KIT Lite object code compatible with other family members. Programs may need to be relocated ADSP-21992 EZ-KIT Lite utilize on-chip memory and conform to the ADSP s interrupt vector and reset vector map. Sixteen condition codes are available. For conditional jump, call, return or arithmetic instructions, the condition can be checked and the operation executed in the same instruction cycle.

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Multifunction instructions allow parallel execution of an arithmetic instruction with up to two fetches or one write to processor memory space during a single instruction cycle. These features allow in-circuit emulation without replacing the ADSP-21992 EZ-KIT Lite system processor by using only a pin connection from the target system to the EZ-ICE. These pins have no function except during emulation, and do not require pull-up or pulldown resistors. The traces for these signals between the ADSP and the connector must be kept as short as possible, no longer than three inches.

The BG output is three-stated.

These signals do not need to be jumper-isolated in your system. The female plug is plugged onto the pin connector a pin strip header on the target board. The pins must be inch square and at least 0. Pin spacing should be 0. The pin strip header must have at least 0. Pin strip headers are available from vendors such as 3M, McKenzie and Samtec. Target Memory Interface For your target system to be compatible with the EZ-ICE emulator, it must comply with the memory interface guidelines listed below. The performance of the EZ-ICE may approach published worst case specification for some memory access timing requirements and switching characteristics.

If your target does not meet the worst case chip specification for memory access parameters, you may not be able to emulate your circuitry at the desired CLKIN frequency. Depending on the severity of the specification violation, you may have trouble manufacturing your system as DSP components statistically vary in switching characteristic and timing requirements within published limits. The pull-up resistors are necessary because there are no internal pull-ups to guarantee their state during prolonged three-state conditions resulting from typical EZ-ICE debugging sessions. ADSP-21992 EZ-KIT Lite your system to be compatible with the following system interface signal changes introduced by the EZ-ICE board: With the exception of boot page 0 loaded into PM RAMall sections of your executable mapped into boot pages are not loaded.

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Deasserted pins are driven to either V DD or. For typical figures for supply currents, refer to Power Dissipation section.

Specifications subject to change without notice. The ADSPxN series ADSP-21992 EZ-KIT Lite of six single chip microcomputers optimized for digital signal processing applications. All series members are pin-compatible and are differentiated solely by the amount of on-chip SRAM. This feature, combined with ADSPxx code compatibility, provides a great deal of flexibility in the design decision.

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Specific family members are shown in Table 1. The DSP tools include an integrated development environment, an evaluation kit, and a serial port emulator. ADSP EZ-KIT Lite Evaluation System Manual xv. Preface. ADSP-21992 EZ-KIT Lite may also obtain additional information about Analog Devices and its products in any of the. The ADSP EZ-KIT Lite hardware is warranted against defects in materials 0x seg_rsvd_rth. Run-time header for new. Monitor. 0.


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